Reference Master Time (PRTC) Equipment Test Method
1Key Takeaways
This document describes the test methods for reference master time (PRTC) equipment, including input function test, local clock function test, local time stamp processing function test, output function test, monitoring management function test, time error test in lock mode, drift generation test in lock mode, jitter ge…
2Expert Interpretation
This article deeply interprets the test methods of PRTC equipment in the YD/T ××××—×××× standard, covering core function tests such as time synchronization input, satellite receiver, local clock, and verification of key performance indicators such as time error and drift generation, providing a technical reference for the construction of communication network time synchronization system.
Technical Background and Evolution of Standards
With the popularization of key applications such as 5G network slicing and financial transactions that require time synchronization accuracy at the microsecond level, YD/T 3841-2020 proposes a time keeping accuracy requirement of ±30ns for PRTC equipment. As a supporting test method, this standard systematically regulates new test scenarios such as multi-satellite system compatibility testing and PTP protocol consistency verification for the first time.
Core Function Test System
| Test Category | Key Technical Indicators | Test Instrument | Judgment Criteria |
|---|---|---|---|
| Time Synchronization Input | Multi-source Switching Delay<100ms | Time Analysis System | YD/T 3841-2020 5.1.1 |
| Satellite Receiver | Capture Sensitivity≤-130dBm | Satellite Simulator | YD/T 3330-2018 |
| Local clock | Rubidium clock stable ≤1E-12 | Frequency tester | 72h holdover characteristics |
Key points of performance test
Time error test case
In a provincial operator's live network test, using the common view receiver as the reference source, it was measured that when the PRTC equipment locked the GNSS signal, the absolute time deviation between the 1PPS output and UTC was 8.2ns, meeting the standard ≤30ns requirement. However, when switched to holdover mode, the max|TE| within 24 hours reached 27.5ns, close to the critical value.
Phase discontinuity control
The standard requires that the phase jump during the switching of the primary and standby clock cards should be ≤20ns. It was measured that a certain model of equipment produced an instantaneous deviation of 15.3ns during redundancy switching, which was mainly due to the convergence time of the clock taming algorithm. It is recommended to use pre-synchronization switching technology for optimization.
Implementation suggestions
- The satellite receiving unit should be equipped with a dual-mode GNSS receiver, and a GPS+Beidou combination is recommended
- The time output interface needs to reserve 30% redundancy to cope with the sudden increase in PTP sessions
- It is recommended to perform hold mode calibration every month to ensure timekeeping accuracy